1. Technical Field
The present disclosure relates to sensors, in particular CMOS technology sensors, and more particularly to a structure of light-sensitive pixel of BSI type (Back-Side Illumination).
2. Description of the Related Art
Such image sensors comprise a network of pixels formed in a semiconductor substrate. Each pixel comprises a photodiode coupled to a read node by a transfer transistor. The electric charges accumulated by the photodiode during an integration time can be transferred to a read node by the transfer transistor. The voltage of the charges accumulated at the read node is read by a read circuit generally comprising a source follower transistor, the gate of which is coupled to the read node. The read circuit also comprises a reset transistor, also coupled to the read node, to reset to zero the voltage at the read node after each read. To reduce the number of components, one well-known method involves sharing the read circuit between several photodiodes.
The sensitivity and thus the quality of the image sensor are in particular related to the capacity of each photodiode to store electric charges. In particular, if during the integration time, several photodiodes can no longer store electric charges, and thus reach a saturation state, the quality of the image supplied by the image sensor will be affected.
To reduce the size of pixels and increase their sensitivity, one well-known method also involves forming the photodiodes in the thickness of the substrate so as to be capable of capturing the light via the rear face of the substrate (BSI technology), whereas the transfer transistors, the read circuits and the electrical links between the pixels and a circuit for managing the image sensor are formed on the front face of the substrate. In this way, the entire rear face of the substrate can be used to capture the light.
FIGS. 1 and 2 are cross-sections and top views representing a pair of pixels 1, 2 of a BSI-type image sensor. FIG. 3 schematically represents a circuit formed by the pair of pixels in FIGS. 1 and 2. The pixels 1, 2 are formed in a silicon substrate 3, in which pixel regions are delimited by perpendicular deep isolating trenches 6. Each pixel comprises a photodiode PD11, PD12 formed in a slightly doped P-conductivity type region 4, 5 of the substrate 3, extending from the surface of the substrate 3 over most of the thickness of the latter. Each photodiode PD11, PD12 comprises a slightly doped N-conductivity type region 13, 23, formed in the region 4, 5. The region 13, 23 extends over most of the thickness of the region 4, 5. Charges resulting from the light reaching the region 4, 5 via the rear face of the substrate 3 accumulate in the region 13, 23. These charges are transferred during a transfer phase toward a read node 10, 20, by a transfer transistor T11, T12 comprising a gate stack 11, 21 formed on the front face of the substrate 3 above the area 13, 23. The read node 10, 20 comprises a heavily doped N-type read region 14, 24 forming a conduction region of the transfer transistor T11, T12. During the transfer phase, charges leave the region 13, 23 by the side and top, toward the read node 10, 20, passing through a channel produced by applying a transfer voltage to the terminal 12, 22 of the gate stack 11, 21 of the transfer transistor T11, T12.
To reduce the number of components per pixel, the pair of pixels 1, 2 comprises a single reset transistor T13 and a single source follower transistor T14, the read nodes 10 and 20 of the two pixels 1, 2 being interconnected by a link 7. The transistor T13 comprises a gate stack 31, a conduction region corresponding to the read region 14, shared with the transfer transistor T11 and a conduction region receiving a voltage VRS. The transistor T14 comprises a gate stack 41 connected to the read nodes 10, 20 and a conduction region receiving a supply voltage VSF. The area of the substrate 3 beneath the gate stack 41 is separated from the read region 24 of the read node 20 by a shallow trench STI. The quantity of charges accumulated by each of the photodiodes PD11, PD12 can be separately measured by means of the transistor T14, by successively controlling the two transfer transistors T11, T12, to transfer the charges accumulated by each photodiode at the read node 10, 20. Between each charge transfer, the reset transistor T13 can be controlled to reset the voltage of the read node 10, 20.
It is desirable to increase the sensitivity of the photodiodes of such a pixel structure, without increasing the surface area of substrate occupied by the pixel.